Verilog Quiz | MCQs | Interview Questions Published: March 22, 2020 | Umair Hussaini Last modified on March 25, 2020 1. The default value for reg data type is ______. 0z1x 2. The possible value(s) of the == operator are: 01zx 3. To suspend a simulation, you can use this system task command. $finish$stop$end$close 4. ______ operator usually comes before the operand. UnaryBinaryTernaryNone 5. @posedge means Transition from x to 1Transition from 0 to 1, x or zTransition from z to 1, xTransition from 1 to 0 6. We can overwrite the value of a parameter during module instantiation using ______. `include`ifdef`define`timescale 7. The wait statement is level sensitiveedge sensitivebothnone 8. In continuous assignment statement LHS can be Scalar netVector netConcatenation of bothall of the above 9. To trigger an event, we can use the following operator. --->=>@== 10. ______ defines special parameters in the specify block. specparamparameterdefparamparam 11. To introduce delays in a circuit, we can use a _________. BufferEXOR gateInverterFlip-flops 12. In most synthesis tools, what will happen when a signal that is needed in a sensitivity list is not included? A warning message will be generated and the code will be synthesized but the resulting netlist will not provide the desired resultsThe synthesis tool will ignore the sensitivity list since all objects that are read as part of a procedural assignment statement are considered to be sensitiveThere will be no effect on the design and pre-synthesis simulation will be consistent with post-synthesis simulation.None of these 13. The keyword deassign is a procedural continuous assignmentcontinuous assignment statementblocking assignment statementnonblocking assignment statement 14. In non-blocking assignment, the compiler Evaluates all RHS for the current time unit and assign to LHS at the end of time unitEvaluates all RHS for the current time unit and assign to LHS at the current timeBoth of the above options are correct, depending on the specific caseNone of the options are correct 15. The phenomenon of clock skew is found in ________. Asynchronous circuitSynchronous circuitBothNeither 16. Cycle based simulation is useful for Synchronous circuitAsynchronous circuitBoth Loading... About The Writer Umair HussainiUmair has a Bachelors Degree in Electronics and Telecommunication.