4-bit parallel adder and 4-bit parallel subtractor – designing & logic diagram

A parallel adder is an arithmetic combinational logic circuit that is used to add more than one bit of data simultaneously. A full adder adds two bits and a carry to give an output. However, to add more than one bit of data in length a parallel adder is used. A parallel adder adds corresponding bits simultaneously using full adders and keeps generating a carry and pushing it towards the next most significant bit to be added. An n-bit parallel adder uses n full adders connected in cascade with each full adder adding the two corresponding bits of both the numbers.

For example, for a binary number D3D2D1D0 and B3B2B1B0, a full adder connected in cascade would add D0 and B0 and send the result to be displayed (LSB). If a carry is generated, it will be passed on to the input of the next full adder.

How to design a 4-bit parallel adder?

To add two Hex codes we need four full adders connected in cascade. This is because a hex code can be represented by four binary bits. The four full adders will connect to each other via their CARRY outputs. And depending on the position of the bits the full adders add, the SUM outputs of the full adders will be connected to the display. The least significant bit will be connected to the LSB of the display. The most significant bit will be connected to the pin one bit before the MSB of the display. The carry output of the final full adder will be connected to the MSB pin of the display.

We can use two hex 4×4 keypads to generate the input bits or we can just add the bits manually. If you want a circuit diagram without the hex keypads as inputs let us know in the comments. Each row of the keypad is connected to a full adder depending on its significance. The first full adder receives inputs from the first row of the hex keypad, the second receives inputs from the second row of the hex keypad and the carry from the first and so on. The resultant combinational logic circuit is shown below.

4-bit parallel adder

4-bit parallel adder

How to design a 4-bit parallel subtractor?

A 4-bit parallel subtractor is used to subtract a number consisting of 4 bits. This is done by cascading a series of full subtractors. For an n-bit parallel subtractor, n full subtractors can be cascaded to achieve the desired output. The connections are exactly the same as that of the 4-bit parallel adder which we saw earlier in this post. Each of the bit is subtracted from its corresponding bit of equal significance from the other number. A borrow if generated, propagates through the cascade of full subtractors.

We use the same 4×4 hex keypads to input data in a full subtractor. The first rows (having the least significance compared to the other rows) of the hex keypads are connected to the first full subtractor. The second rows to the second full subtractor’s inputs along with the borrow from the first full subtractor and so on. The output of each full adder is connected to the display on the basis of their positional significance in the answer.  i.e the output of the first full subtractor is connected to the LSB of the display. The final borrow output of the final full subtractor is connected to the MSB pin of the display.

 

4-bit parallel subtractor

4-bit parallel subtractor

What are the advantages of a parallel adder and a parallel subtractor?

  • Since the operation is parallel and simultaneous the time required to complete the operation is independent of the number of bits.
  • Hence they are also faster than their serial counterparts.
  • It is cheaper.

What are the disadvantages of a parallel adder and a parallel subtractor?

Each adder or subtractor receives inputs to their A and B ports instantaneously. However, the carry/borrow ports don’t get their inputs till the earlier adder or subtractor are done finishing their operation. This introduces a delay.

This delay adds up as the number of full adders/full subtractors increase.

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