VHDL course for Engineers- VHDL coding tutorials

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VLSI career FAQs free course in VLSI and CMOS

What is VLSI? And what are the job opportunities for a VLSI student?

August 8, 2018

Get introduced to the exciting world of VLSI and chip design, get to know its applications, scope and get an overview of the course structure.

vhdl code for all logic gates using dataflow model

VHDL code for all logic gates using dataflow method – full code and explanation

November 8, 2018

A complete line by line explanation, implementation and the VHDL code for all logic gates using the dataflow architecture.

VHDL CODE & FULL EXPLANATION FULL ADDER USING BEHAVIORAL

VHDL code for half adder & full adder using dataflow method – full code & explanation

November 10, 2018

In this next post, we will understand and the VHDL code for half adder & full adder using the dataflow architecture.

VHDL CODE & FULL EXPLANATION full subtractor and half subtractor using dataflow

VHDL code for full subtractor & half subtractor using dataflow method – full code & explanation

November 8, 2018

A complete line by line explanation and the VHDL code for full subtractor & half subtractor using the dataflow architecture.

VHDL code for multiplexer using dataflow method

VHDL code for multiplexer using dataflow method – full code and explanation

November 11, 2018

A complete line by line explanation, implementation and the VHDL code for multiplexer using the dataflow architecture and select statements.

VHDL code for demultiplexer using dataflow method

VHDL code for demultiplexer using dataflow method – full code & explanation

Next up we will write the VHDL code for demultiplexer using the dataflow architecture and select statements. We will code the 1:2 and 1:4 demultiplexer.

VHDL code for an encoder using dataflow method

VHDL code for an encoder using dataflow method – full code and explanation

Two different methods of writing the VHDL code for an encoder using the dataflow architecture. We will be coding the encoder using equations & truth tables.

VHDL code for decoder using dataflow method - full code and explanation

VHDL code for decoder using dataflow method – full code and explanation

November 17, 2018

Next up, let’s write the VHDL code for avdecoder using the dataflow architecture. We will be programming a 2:4 decoder.

VHDL CODE & FULL EXPLANATION FULL ADDER USING BEHAVIORAL

VHDL code for full adder using behavioral method – full code & explanation

November 8, 2018

A complete line by line explanation and the VHDL code for full adder using behavioral architecture method. We will be using the if-else logic in this code.

VHDL code for half subtractor using behavioral method

VHDL code for half subtractor using behavioral method – full code & explanation

November 12, 2018

Programming the half subtractor in VHDL using behavioral architecture with if-else-if commands.

VHDL code for full subtractor using behavioral method - full code & explanation

VHDL code for full subtractor using behavioral method – full code & explanation

November 9, 2018

A complete line by line explanation and the VHDL code for full subtractor using behavioral architecture method. We will be using the if-elsif logic in this code.

vhdl 2 bit multiplier dataflow structural behavioral

VHDL code for a 2-bit multiplier – All modeling styles

March 28, 2020

In this article, we will be writing the VHDL code for a 2-bit binary multiplier using all the three modeling techniques. We will write the code, testbench and will also create the RTL schematics for the same. Binary multiplier (2-bit) A multiplier is a circuit that takes two numbers as input and produces their product […]

VHDL code for comparator using behavioral method

VHDL code for comparator using behavioral method – full code and explanation

November 12, 2018

In this tutorial, we will use the case statement of the behavioral architecture to write the VHDL code for comparators.

VHDL code for multiplexer using behavioral method

VHDL code for multiplexer using behavioral method – full code and explanation

A complete explanation, implementation and the VHDL code for a 4:1 multiplexer using behavioral architecture and if-else statements.

VHDL code for demultiplexer using behavioral method - full code & explanation

VHDL code for demultiplexer using behavioral method – full code & explanation

August 16, 2019

A complete line by line explanation, implementation and the VHDL code for demultiplexer using behavioral architecture and if-elsif statements.

VHDL code for an encoder using behavioral method

VHDL code for an encoder using behavioral method – full code and explanation

A full explanation of using the truth tables to write the VHDL code for a 4:2 encoder using the behavioral method.

VHDL code for decoder using behavioral method - full code and explanation

VHDL code for decoder using behavioral method – full code and explanation

Now we will program the same decoder using VHDL case statements and the behavioral architecture.

VHDL code for flip-flops using behavioral method - full code of all flip-flops

VHDL code for flip-flops using behavioral method – full code

August 17, 2019

A complete line by line explanation of the VHDL code for flip-flops using the behavioral architecture. We will be coding SR, JK, T, and D flip-flops.

VHDL CODE FOR SYNCHRONOUS COUNTERS USING BEHAVIORAL

VHDL code for synchronous counters using behavioral method

August 18, 2019

A complete line by line explanation and the VHDL code for synchronous counters using the behavioral architecture. We will be programming 4-bit counters.

VHDL code for full adder using structural method

VHDL code for full adder using structural method – full code and explanation

August 14, 2019

Next up, we will write the VHDL code for a full adder using the structural architecture modeling style using two half adders and an OR gate.

VHDL code for EXOR using NAND & structural method

VHDL code for EXOR using NAND & structural method – full code & explanation

August 15, 2019

A complete line by line explanation, implementation and the VHDL code for EXOR using NAND. We will use structural architecture.

vhdl code for 4_2 priority encoder all modeling styles

VHDL code for a priority encoder – All modeling styles

March 25, 2020

Description of a 4:2 priority encoder using dataflow, behavioral & structural modeling styles in VHDL. Along with a detailed explanation, RTL schematics & waveforms.

VHDL code for ALU using structural method

VHDL code for ALU (1-bit) using structural method – full code and explanation

August 16, 2019

A complete line by line explanation, implementation and the VHDL code for a 1-bit Arithmetic Logic Unit (ALU) using the structural modeling architecture.

vhdl quiz mcqs interview questions

VHDL Quiz | MCQs | Interview Questions

March 19, 2020

This VHDL quiz is designed to test a wide array of concepts that a designer is expected to be familiar with. We’ve already covered these topics in this free VHDL course. The questions will test your ability to recall important language elements and their applications. Clear this quiz to gain access to the final certification test. Please ensure that you are signed in before attempting the quiz.

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