The interfacing of the I/O devices can be done in two ways:
- Memory-Mapped I/O Interfacing
- Standard I/O Mapped I/O Interfacing (also known as isolated I/O interfacing).
What is I/O mapped I/O?
Every microprocessor is going to be interfaced with memory and some external I/O devices. How do we access these two from the microprocessor? How do we, for example, store some data in the interfaced memory? Or send some output to an interfaced device?
We use some form of address and then transfer or output the data at that particular address. That implies that these devices have an address space (say from 0000H to FFFFH). The size of this address space, of course, depends on the number of pins that are used to connect. (2^n, where n is the number of pins).
In I/O mapped I/O or isolated I/O mapping, the I/O devices are given a separate addressing region. Separate from what? Separate from the memory. These separate address spaces are known as ‘Ports’.
In 8085, we use 8-bit address lines for creating this special address space for the I/O devices. That means that we can have an address space of 2^8 = 256 bytes (In hexadecimal, this implies a memory range from 00H to FFH. FF is 255).
The I/O devices which are interfaced with the processor are provided with a ‘port number’ among the entire 8-bit address range (ranging from 00H to FFH).
Since there is a dedicated address region for I/Os, it makes sense to have dedicated I/O instructions too. These I/O mapped I/Os can send/receive data from the processor using IN and OUT commands only.
However, none of the ALU operations can be directly applied to the data of the I/O mapped I/O devices.
- There is minimal logic involved in decoding a discrete address for the interfaced peripheral.
- We get special instructions only for I/O.
- Since these I/Os have a separate address space (8-bits), the entire 64K bytes (16-bit address line) is available just for memory.
- The whole system is smaller and less complicated.
- This method works faster due to lesser delays.
- Compared to the Memory Mapped I/O, more instructions are required to complete the same task.
- Arithmetic and Logical instructions cannot be applied to the data.
- Less powerful and flexible than memory-mapped I/O.
- We need extra control signal lines to switch between the two different address spaces that are created in I/O mapped I/O. This increases the number of pins.
What is Memory Mapped I/O?
In memory-mapped I/O, we say screw you to the I/Os. You are not special. You’ll be treated just like any other memory device. No special address space and no special instructions.
Under the Memory-mapped I/O interfacing, the processor treats the I/O devices like any other memory location. The I/O devices are efficiently mapped into the system memory along with the RAM and ROM memory. These devices are assigned with a 16-bit address value within the entire address range of the Intel 8085 Microprocessor.
If data is to be exchanged with these devices, they follow the data transfer instructions that we usually use when we work with memory. Thus, a user can use the same instruction commands for data transfer to/from an I/O as they use for memory.
The I/O device information can also be sent to the Arithmetic Logical Unit. The LOAD and STORE instructions are executed to read from and write to the I/O devices, just like they are utilized for the memory.
- This method of interfacing gives us a single address space, as well as a common set of instructions to be used for both the memory & I/O operations.
- The memory ordering rules & memory barriers can be defined here, which will apply both to the device accesses and normal memory.
- An entirely different set of opcodes for I/O commands is not necessary. Instead, you can reuse your ordinary memory access instructions.
- The same memory mapping mechanisms which are used for other memory can be used to gain access to the devices as well.
- It is very beneficial to use the low-latency buses in the system.
- The I/O intensive operations can be much quicker since the information content need not be copied between the kernel space and the user space.
- Separate control signals are not required since there is no switching between two different address spaces. We just have one unified address space for both memory and I/O devices. This saves time as well as real-estate on the chip.
- With respect to 8085, the address lines are of 16-bits, so you get an option of using up to 64k I/O ports, as opposed to just 256 in I/O mapped I/O.
- The working of the cache controller gets complicated, as the interfaced peripherals differ in their behavior when compared to normal memory. We’ll read about this in detail later in our embedded systems course track.
- The instruction scheduling becomes more difficult as the processor cannot recognize if any information is loaded/stored in the memory or in the device.
- The entire address bus has to be fully decoded for every peripheral. Say, a machine with a 64-bit address bus will need logic gates to resolve the states of all the 64 address lines, to decode the particular address of any peripheral properly.
- The more the system bit configuration, the more is the cost of adding the machine with extra complex hardware.
- The mode works much slower than I/O mapped I/O interfacing.
Differences between I/O mapped I/O and Memory-mapped I/O
|Memory-Mapped I/O Interfacing||I/O Mapped I/O Interfacing|
|The I/O devices and memory, both are treated as memory.||The I/O devices are treated as I/O devices and the memory is treated as memory.|
|The I/O devices are provided with 16-bit address values (in 8085)||The I/O devices are provided with 8-bit address values. (In 8085)|
|The interfaced devices are accessed by the memory read or memory write cycles.||The interfaced devices are accessed by the I/O read or I/O write cycles.|
|The peripherals or the I/O ports are treated as memory locations. Thus, all the instructions related to the memory can be utilized for the data exchange between the processor and the I/O device.||Only the IN and the OUT instructions can be put to use for transferring information between the I/O device and the processor.|
|In the memory-mapped ports, the information data can be moved to the I/O devices from any register or vice versa.||In the I/O mapped ports, the information bytes can be moved around between the ports and the accumulator register only.|
|The full memory address space cannot be used solely for addressing memory for interfacing.||The full memory address space can be used solely for addressing memory for interfacing.|
|Data transfer is possible between any register and I/O device.||Data transfer is possible between the accumulator and I/O device only.|
|Here, a large number of I/O ports (216 ports) are possible to be used for interfacing.||Only 256 I/O ports i.e., 28 ports, are made available for interfacing.|
|While executing the memory, write or read cycles, the IO/M` is set to low (IO/M` = 0 ).||While executing the I/O write or read cycles, the IO/M` is set to high (IO/M` = 1 ).|
|There is more decoder hardware involved.||There is less decoder hardware involved.|
|Separate control signals are not required since we have a unified memory space.||Special control signals are used here since we have separate memory spaces.|
|We can perform arithmetic and logical operations on the data.||We cannot perform arithmetic and logical operations on the data.|
This is an important concept to understand from an embedded systems perspective. When we study the ARM processor in our course on ARM Cortex M3/M4, you’ll notice that the registers are memory-mapped. The point is, this concept transcends a specific microprocessor. So it would be great if you could truly understand it.