In this article, we will take a look at some elements of the VHDL language that are commonly used across all implementations. These elements give shape and format to your program. Some of these are essential to the functioning of your design. These basic elements make up the complete fundamental basis of VHDL syntax. VHDL […]
A testbench is an HDL code that is written to test the circuit you designed using the same HDL. It is an important step in the chip design process after performing which you can proceed to the next step. In this post, we will understand the importance of writing testbenches, their types, syntax, and also take up some examples.
The third modeling style is absolutely easy to understand. Structural modeling is an excellent choice for modular design. It’s also great for larger circuits. You can reuse smaller components by simply connecting them to each other. Let’s take a look at how it’s done.
The second modeling style available to describe digital circuits is known as behavioral modeling style or architecture. This one’s a bit more complex than dataflow. But it is also the most powerful among the three styles. In other words, it is the highest abstraction layer for designing a circuit using an HDL. Here, we describe a circuit in terms of its behavior. Now that’s exciting because it needs you to really know the circuit you’ll be designing. Let’s check out how to use this modeling style in this post.
VHDL offers us three models of describing a digital circuit. Dataflow is the first and the easiest of the three modeling styles (or architecture). In this style of modeling a digital circuit using VHDL, we just need to show the flow of data from input to output. That’s generally done using a simple formula that gives the output in terms of the input. But hang on! There’s a bit more to it in terms of syntax, data types, and the statements that you can use. Check it all out in this post.
Any language comes with own set of permissible operations. Here are the ones that you can use in VHDL. This post is a systematic representation of all the operators in VHDL with brief descriptions and easy to understand examples of their applications. The usage of operators is an important fundamental concept to understand.
Data types are an important language element. You’ll notice in this course that we use a lot of different kinds of data. For example, a single bit, multiple streams of bits, boolean, etc. To understand and classify them, data types are necessary. In this post, you’ll see the different types of data that VHDL is capable of handling. We will understand the need and working of each data type along with the proper syntax to implement them.
A complete line by line explanation of the VHDL code for a 2-bit multiplier using all the three modeling styles.
Description of a 4:2 priority encoder using dataflow, behavioral & structural modeling styles in VHDL. Along with a detailed explanation, RTL schematics & waveforms.
This VHDL quiz is designed to test a wide array of concepts that a designer is expected to be familiar with. We’ve already covered these topics in this free VHDL course. The questions will test your ability to recall important language elements and their applications. Clear this quiz to gain access to the final certification test. Please ensure that you are signed in before attempting the quiz.
A complete line by line explanation and the VHDL code for synchronous counters using the behavioral architecture. We will be programming 4-bit counters.
A complete line by line explanation of the VHDL code for flip-flops using the behavioral architecture. We will be coding SR, JK, T, and D flip-flops.
A full explanation of using the truth tables to write the VHDL code for a 4:2 encoder using the behavioral method.
Now we will program the same decoder using VHDL case statements and the behavioral architecture.
A complete line by line explanation, implementation and the VHDL code for demultiplexer using behavioral architecture and if-elsif statements.
A complete line by line explanation, implementation and the VHDL code for a 1-bit Arithmetic Logic Unit (ALU) using the structural modeling architecture.
A complete line by line explanation, implementation and the VHDL code for EXOR using NAND. We will use structural architecture.
Next up, we will write the VHDL code for a full adder using the structural architecture modeling style using two half adders and an OR gate.
Next up, let’s write the VHDL code for avdecoder using the dataflow architecture. We will be programming a 2:4 decoder.
In this tutorial, we will use the case statement of the behavioral architecture to write the VHDL code for comparators.
A complete explanation, implementation and the VHDL code for a 4:1 multiplexer using behavioral architecture and if-else statements.
Programming the half subtractor in VHDL using behavioral architecture with if-else-if commands.
Two different methods of writing the VHDL code for an encoder using the dataflow architecture. We will be coding the encoder using equations & truth tables.
A complete line by line explanation, implementation and the VHDL code for multiplexer using the dataflow architecture and select statements.
Next up we will write the VHDL code for demultiplexer using the dataflow architecture and select statements. We will code the 1:2 and 1:4 demultiplexer.
In this next post, we will understand and the VHDL code for half adder & full adder using the dataflow architecture.
A complete line by line explanation and the VHDL code for full subtractor using behavioral architecture method. We will be using the if-elsif logic in this code.
A complete line by line explanation, implementation and the VHDL code for all logic gates using the dataflow architecture.
A complete line by line explanation and the VHDL code for full adder using behavioral architecture method. We will be using the if-else logic in this code.
A complete line by line explanation and the VHDL code for full subtractor & half subtractor using the dataflow architecture.
Get introduced to the exciting world of VLSI and chip design, get to know its applications, scope and get an overview of the course structure.
